1. Field of Invention
The present invention relates to a chip package structure. More particularly, the present invention relates to a chip package structure with guard wire protection circuits.
2. Description of Related Art
Following the rapid progress in electronic technologies, many types of electrical appliances are integrated into our every day life. In general, these electrical appliances are driven by one or more integrated circuits (ICs) processed on a die. To protect the fragile die and provide a proper signal communicative channel to external equipment, the die is normally housed inside a package. At present, a variety of packaging techniques classified according to the chip bonding technique are available. The most common bonding techniques include wire bonding (W/B), flip chip (F/C) and tape automatic bonding (TAB). Among the bonding techniques, wire bonding (W/B) has the longest history and is well developed.
For radio frequency (RF) circuits and high-speed circuits, operating frequency and electrical performance considerations often demand the provision of a large ground area in a RF circuit die or a high-speed circuit die. Consequently, chip packages that house an RF circuit die or a high-speed circuit die including the quad flat non-leaded (QFN) and the bump chip carrier (BCC) typically use wire bonding technique to join up with the die.
FIG. 1 is a cross-section view of a conventional quad flat non-leaded package. The chip package 100 mainly includes a carrier 110, a die 120, a plurality of conductive wires 130 and some molding compound 140. The carrier 110 has a die pad 112 and a plurality of electrode bumps 114. The electrode bumps 114 surround the die pad 112. The chip 120 has an active surface 122 and a corresponding back surface 123. The back surface 123 of the die 120 is attached to the die pad 112. In general, the active surface 122 is the surface on the die 120 where active devices are processed and bonding pads 124 are positioned. Furthermore, the two ends of a portion of the conductive wires 130 are connected to a corresponding bonding pad 124 and a contact 118 on the upper surface of the electrode bump 114 respectively. Similarly, the two ends of another portion of the conductive wires 130 are connected to a corresponding bonding pad 124 and a contact 116 on the upper surface of the die pad 112 respectively. The molding compound 140 encapsulates the die 120 and the conductive wires 130 while exposing the bottom surface of the die pad 112 and the electrode bumps 114. Hence, the die 120 is able to connect electrically with external devices through the die pad 112 and the electrode bumps 114. Note that aside from supporting the die 120, the die pad 112 on the carrier 110 also provides a large surface area for ground connection and cooling.
When an RF circuit die or a high-speed circuit die is housed inside a QFN package, a pair of ground wires are often placed on each side of a high frequency signal wire running in a direction parallel to the signal wire direction. This prevents the interference of external signals and narrows down the area vulnerable to electromagnetic field produced by the high frequency signals. In other words, these pairs of ground wires serve as a guard circuit for the high frequency signal wire. FIGS. 2A to 2D are top views of four conventional guard circuit designs. However, none of these designs are able to provide an optimal protection to the high frequency signal wires. The reason for this will be elaborated further in the embodiment below.